Reuse Methodology Manual for System-on-a-Chip Designs Third Edition outlines a set of best
practices for creating reusable designs for use in an SoC design methodology. These practices
are based on the authors' experience in developing reusable designs as well as the experience
of design teams in many companies around the world. Silicon and tool technologies move so
quickly that many of the details of design-for-reuse will undoubtedly continue to evolve over
time. But the fundamental aspects of the methodology described in this book have become widely
adopted and are likely to form the foundation of chip design for some time to come. Development
methodology necessarily differs between system designers and processor designers as well as
between DSP developers and chipset developers. However there is a common set of problems
facing everyone who is designing complex chips. In response to these problems design teams
have adopted a block-based design approach that emphasizes design reuse. Reusing macros
(sometimes called cores) that have already been designed and verified helps to address all of
the problems above. However in adopting reuse-based design design teams have run into a
significant problem. Reusing blocks that have not been explicitly designed for reuse has often
provided little or no benefit to the team. The effort to integrate a pre-existing block into
new designs can become prohibitively high if the block does not provide the right views the
right documentation and the right functionality. From this experience design teams have
realized that reuse-based design requires an explicit methodology for developing reusable
macros that are easy to integrate into SoC designs. This manual focuses on describing these
techniques.
