This book summarizes the recent breakthroughs in hardware implementation of neuro-inspired
computing using resistive synaptic devices. The authors describe how two-terminal solid-state
resistive memories can emulate synaptic weights in a neural network. Readers will benefit from
state-of-the-art summaries of resistive synaptic devices from the individual cell
characteristics to the large-scale array integration. This book also discusses peripheral
neuron circuits design challenges and design strategies. Finally the authors describe the
impact of device non-ideal properties (e.g. noise variation yield) and their impact on the
learning performance at the system-level using a device-algorithm co-design methodology.
