9783031006180 - Synthesis Lectures on Computer Architecture   Single-Instruction Multiple-Data Execution - Christopher J Hughes Kartoniert (TB)

EAN: 9783031006180

Produktdaten aktualisiert am: 22.11.2024
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Having hit power limitations to even more aggressive out-of-order execution in processor cores many architects in the past decade have turned to single-instruction-multiple-data (SIMD) execution to increase single-threaded performance. SIMD execution or having a single instruction drive execution of an identical operation on multiple data items was already well established as a technique to efficiently exploit data parallelism. Furthermore support for it was already included in many commodity processors. However in the past decade SIMD execution has seen a dramatic increase in the set of applications using it which has motivated big improvements in hardware support in mainstream microprocessors. The easiest way to provide a big performance boost to SIMD hardware is to make it wider-i.e. increase the number of data items hardware operates on simultaneously. Indeed microprocessor vendors have done this. However as we exploit more data parallelism in applications certain challenges can negatively impact performance. In particular conditional execution non-contiguous memory accesses and the presence of some dependences across data items are key roadblocks to achieving peak performance with SIMD execution. This book first describes data parallelism and why it is so common in popular applications. We then describe SIMD execution and explain where its performance and energy benefits come from compared to other techniques to exploit parallelism. Finally we describe SIMD hardware support in current commodity microprocessors. This includes both expected design tradeoffs as well as unexpected ones as we work to overcome challenges encountered when trying to map real software to SIMD execution.

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