EAN: 9783960670582

DESIGN AND IMPLEMENTATION OF CARRY SELECT ADDER...

Adders are the basic building blocks of any processor or data path application. In adder design
carry generation is the critical path. To reduce the power consumption of the data path  we
need to reduce the area of the adder. Carry Select Adder is one of the fast adders used in may
data path applications. The proposed design is implemented without using multiplexer and RCA
structure with Cin=1. Instead of using multiplexer and RCA Cin=1 structure  we use simple
combinational circuit. After speed  power dissipation is one of the most important design
objectives in integrated circuits. As adders are the most widely used components in such
circuits  the design of efficient adder is of much concern for researchers. This paper presents
a performance analysis of different Fast Adders. The comparison is done on the basis of three
performance parameters  i.e. Area  Speed and Power consumption. We also show a modified carry
select adder designed at different stages.

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